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ADR430/ADR431/ADR433/ADR434/ADR435/ADR439
THEORY OF OPERATION
The ADR43x series of references uses a reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low supply current, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
The ADR43x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 4.1 V
to 18 V. When these devices are used in applications at higher
currents, use the following equation to account for the
temperature effects due to the power dissipation increases:
(JFETs), one of which has an extra channel implant to raise its
T J = P D × θ JA + T A
(2)
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified and
used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about ?120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon and can
be compensated closely by adding a correction term generated
in the same fashion as the proportional-to-temperature (PTAT)
term used to compensate band gap references. The primary
advantage of an XFET reference is its correction term, which is
~30 times lower and requires less correction than that of a band
gap reference. Because most of the noise of a band gap reference
where:
T J and T A are the junction and ambient temperatures, respectively.
P D is the device power dissipation.
θ JA is the device package thermal resistance.
BASIC VOLTAGE REFERENCE CONNECTIONS
Voltage references, in general, require a bypass capacitor
illustrates the basic configuration for the ADR43x family
of references. Other than a 0.1 μF capacitor at the output to
help improve noise suppression, a large output capacitor at
the output is not required for circuit stability.
TOP VIEW
(Not to Scale)
comes from the temperature compensation circuitry, the XFET
results in much lower noise.
temperature correction term is provided by a current source
V IN
10μF
+
0.1μF
TP
NC
GND
1 8
2 ADR43x 7
3 6
4 5
TP
COMP
V OUT
TRIM
0.1μF
with a value designed to be proportional to absolute temperature.
The general equation is
V OUT = G ( ΔV P – R1 × I PTAT )
where:
G is the gain of the reciprocal of the divider ratio.
(1)
NOTES:
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
Figure 30. Basic Voltage Reference Configuration
NOISE PERFORMANCE
Δ V P is the difference in pinch-off voltage between the two JFETs.
I PTAT is the positive temperature coefficient correction current.
ADR43x devices are created by on-chip adjustment of R2 and R3 to
achieve 2.048 V or 2.500 V, respectively, at the reference output.
V IN
I 1 I 1
I PTAT ADR43x
V OUT
R2
*
The noise generated by the ADR43x family of references is
typically less than 3.75 μV p-p over the 0.1 Hz to 10.0 Hz band
for ADR430, ADR431, and ADR433. Figure 22 shows the 0.1 Hz
to 10.0 Hz noise of the ADR431, which is only 3.5 μV p-p. The
noise measurement is made with a band-pass filter made of a
2-pole high-pass filter with a corner frequency at 0.1 Hz and a
2-pole low-pass filter with a corner frequency at 10.0 Hz.
HIGH FREQUENCY NOISE
The total noise generated by the ADR43x family of references is
? V P
R1
R3
shows the wideband noise from 10 Hz to 25 kHz. An internal node
of the op amp is brought out on Pin 7, and by overcompensating
the op amp, the overall noise can be reduced.
*EXTRA CHANNEL IMPLANT
V OUT = G( ? V P – R1 × I PTAT )
Figure 29. Simplified Schematic Device
GND
This is understood by considering that in a closed-loop
configuration, the effective output impedance of an op amp is
Power Dissipation Considerations
R O =
r O
1 + A VO β
(3)
where:
R O is the apparent output impedance.
r O is the output resistance of the op amp.
A VO is the open-loop gain at the frequency of interest.
β is the feedback factor.
Rev. J | Page 16 of 24
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